1. Field of the Invention
The invention relates to a layout pattern and a photomask including the layout pattern.
2. Description of Related Art
With the improvement in integrity of integrated circuits, the critical dimension (CD) of semiconductor devices continues to decrease. Consequently, the distance between the devices has to be shortened accordingly, which results in demand for higher resolution of the lithographic process. Generally, asymmetric pattern distribution is inevitable for small-sized high-integrity devices.
The asymmetric pattern comes from the layout pattern that has been designed in the photomask, for example. The layout pattern is transferred to a photoresist layer by the lithographic process and then transferred to a layer to be etched under the photoresist layer by an etching process. However, when transferring the asymmetric pattern to the photoresist layer, different pitches on two sides of the photoresist cause asymmetric surface tensions. For this reason, photoresist collapse may easily occur. Such a phenomenon causes defects in the devices and results in electrical problems and reduction of product yield. Hence, how to improve photoresist collapse caused by the asymmetric pattern is an important issue in this field.